Assume that to spell check a large file, 100.000 instructions are needed. The instructions in the program are broken down into 4 different classes, and each class requires its own number of clock cycles to execute. Specific information is given in the table below. Instruction Class Branch Store Load ALU / R-type Clock Cycles per Instruction Number of Instructions 3 10.000 20,000 5 30,000 4 40.000 4 Part A 10 POINTS) If the total execution time for this program is found to be 2 seconds, what is the clock rate (expressed in KHz) of the computer on which it was run? Part B(5 POINTS) Now, assume that as part of the 100,000 instruction spell check, 20% of all the original number of Load instructions are immediately followed by an ALU/R-type instruction that uses the data that was just loaded. To speed up the original spell check program, we are contemplating adding a new type of instruction to our architecture : an ALU instruction where one of the source operands is a value from memory. Ex: add rd, rs1, mem[address This new instruction will replace the previous 2 instruction sequenceſLoad followed by ALU/R type) It will take 7 clock cycles. Will this change offer any speedup over the original design? If so, how much? You may assume that the clock rate does not change and your answer to this question does not depend on your answer to Part A. Please upload your work showing all relevant calculations