A single SRAM bitcell has a failure probability of 1.6 10-9. When these SRAM bitcells were used to form a large SRAM array, assume that the cell failure probabilities are independent such that we could apply Equation (7.21). Also assume that a SRAM array fails if any cell in the entire array fails (a) What is the parametric yield (-1-failure probability ) of 8Mb SRAM array ? (b) What is the parametric yield 1 - (failure probability)) of 512Mb SRAM array? (c) What is the largest array size that has achieves 95% parametric yield?