Alarm clocks and old-time calculator used seven-segment LED displays to display digits and sometimes letters. For this project, you will design a combinational logic circuit using Verilog which will accept a four-bit binary number as input and display the decimal value up to 9, and the letter "H" if the decimal value exceeds 9. In other words, the first ten permutations, 0000 – 1001 should be interpreted as decimal digits and the remaining permutations 1011-1111 should correspond to "H", indicating Hexadecimal. You are to design the combinational circuit of the 7-Segment decoder. Your design should have seven outputs – one for each segment of a display digit as follows.

Respuesta :

Answer:

module display_decoder(

   input [3:0] number,

   output [6:0] display

   );

   assign display =

     (number == 4'b0000) ? 7'b1111110 :

     (number == 4'b0001) ? 7'b0110000 :

     (number == 4'b0010) ? 7'b1101101 :

     (number == 4'b0011) ? 7'b1111001 :

     (number == 4'b0100) ? 7'b0110011 :

     (number == 4'b0101) ? 7'b1011011 :

     (number == 4'b0110) ? 7'b1011011 :

     (number == 4'b0111) ? 7'b1110000 :

     (number == 4'b1000) ? 7'b1111111 :

     (number == 4'b1001) ? 7'b1111011 :

     7'b0110111;

endmodule